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Mr. Deepak Mittal

Mr. Deepak Mittal

  • Assistant Professor
    Institute of Engineering & Technology
  • Department

    Department of Computer Engineering & Applications
  • Contact Details:

    Email : deepak.mittal@gla.ac.in

    Contact Number :8273093425

  • Experience

    12 years of Teaching/Research/Industry experience

  • Qualifications

    • M.TECH Specialized in VLSI DESIGN from VIT University TAMILNADU Completed May 2015 secured First Division.
    • B.TECH Specialized in Electronics and Telecommunication from IETE New Delhi Completed June 2010 secured First Division.
  • Ph.D

    Thesis Supervised

  • Awarded/ Completed-

    Working-

  • Postgraduate

    Thesis Supervised

  • Awarded/ Completed-

    Working-

  • DESIGN A CIRCUIT LEVEL LOW LEAKAGE AND ROBUST FLIP LECTOR APPROACH FOR SRAM CELL Mittal, D., Tomar, V.K. Journal of Theoretical and Applied Information Technology, 2025, 103(5), pp. 1667–1685
  • 6T SRAM Cell Based Various Spillage Reduction Techniques for Low Power Applications Mittal, D. 2024 15th International Conference on Computing Communication and Networking Technologies, ICCCNT 2024, 2024
  • SRAM Cell Leakage Reduction Methodologies for Low Leakage Cache Memories Mittal, D. 2023 14th International Conference on Computing Communication and Networking Technologies, ICCCNT 2023, 2023
  • Design a Gated PMOS Spillage Reduction Approach for CMOS SRAM Cell in 90nm Technology Node Mittal, D. 2023 14th International Conference on Computing Communication and Networking Technologies, ICCCNT 2023.
  • Performance Evaluation of Circuit Level Leakage Reduction Approaches for 6T SRAM Cell Mittal, D. 2022 6th International Conference on Computing, Communication, Control and Automation, ICCUBEA 2022, 2022
  • Performance Analysis of Various CMOS SRAM Cells Mittal, D. 2022 13th International Conference on Computing Communication and Networking Technologies, ICCCNT 2022, 2022
  • 6T SRAM Cell Design Using CMOS at Different Technology nodes Mittal, D. 2022 IEEE 3rd Global Conference for Advancement in Technology, GCAT 2022, 2022
  • Analysis of Parallel Prefix Adders with Low Power and Higher Speed Mittal, D. 3rd International Conference on Electronics and Sustainable Communication Systems, ICESC 2022 - Proceedings, 2022, pp. 288–292
  • Performance Analysis of 6T and 11T SRAM Cell Topologies at 45nm Era Mittal, D. 2022 International Conference for Advancement in Technology, ICONAT 2022.
  • Implementation and analysis of Leakage Reduction Techniques in 6T SRAM cell Mittal, D., Tomar, V.K. IOP Conference Series: Materials Science and Engineering, 2021, 1033(1), 012037
  • Comparative Analysis of Spillage Minimization Approaches for SRAM Cell Mittal, D. 2021 5th International Conference on Electrical, Electronics, Communication, Computer Technologies and Optimization Techniques, ICEECCOT 2021 - Proceedings, 2021, pp. 686–689
  • Normal and Abnormal Spillage Suppression Methodologies for the SRAM Sense Amplifiers Mittal, D. Proceedings of IEEE International Conference on Advent Trends in Multidisciplinary Research and Innovation, ICATMRI 2020, 2020, 9398401
  • Performance Evaluation of 6T, 7T, 8T, and 9T SRAM cell Topologies at 90 nm Technology Node Mittal, D., Tomar, V.K. 2020 11th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2020, 2020, 9225554
  • Designing of Multiplexer and De-Multiplexer Using Different Adiabatic Logic in 90nm Technology Mittal, D., Niranjan, A. 2018 9th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2018, 2018, 8494170
  • Extraordinary leakage suppression techniques in memory system design Mittal, D., Vigneswaran, T. International Journal of Applied Engineering Research, 2015, 10(20), pp. 18004–18007
  • Power and area efficient different adiabatic logic based adders Mittal, D., Vigneswaran, T. International Journal of Applied Engineering Research, 2015, 10(20), pp. 15797–15801
  • Leakage reduction using power gating techniques in SRAM sense amplifiers Mittal, D., Vigneswaran, T. ARPN Journal of Engineering and Applied Sciences, 2015, 10(7), pp. 2994–3000
  • Investigation of 7T SRAM Cell for IoT based devices D Mittal, VK Tomar IOP Conference Series: Materials Science and Engineering 1116 (1), 012179
  • Received Award for Excellence in Classroom Teaching for Academic session 2021-22
  • Life Membership of I.E.T.E.

Extra-Curricular Activities

  • Attended 5 days Faculty Development program on “EXPLORING THE MODERN CIRCUITS, DEVICES AND SYSTEM DESIGNS IN NANOTECHNOLOGY” VIT UNIVERSITY, VELLORE 01 April to 05 April 2024.
  • Attended 5 days Faculty Development program on “MODELLING SIMULATION AND FABRICATION OF ADVANCED ELECTRONIC DEVICES” VIT UNIVERSITY, VELLORE 15 April to 19 April 2023.
  • Attended 10 days Faculty Development program on “LOW POWER VLSI DESIGN” NATIONAL INSTITUTE OF TECHNOLOGY, WARANGAL 28 March 2022-7April 2022.
  • Attended 5 days FACULTY DEVELOPMENT PROGRAM ON “RECENT TRENDS IN WIRELESS COMMUNICATION AND ALLIED DOMAINS” ABV -INDIAN INSTITUTE OF INFORMATION TECHNOLOGY AND MANAGEMENT, GWALIOR, 27th January to 31 January 2021.
  • Attended One Week Online Short Term Course “SUB-MICROMETER SEMICONDUCTOR DEVICE TO CIRCUIT CO-DESIGN AND MODELING TECHNIQUES” DR. B.R. AMBEDKAR NATIONAL INSTITUTE OF TECHNOLOGY, JALLANDHAR, 20th August to 24th  August 2024.
  • Attended 3 days faculty development program on "CMOS ICs Methodology of Circuit to Chip Design" held at GLA University, Mathura from 21st to 23rd February 2019.
  • Attended 5 days Faculty Development program on Emerging Trends in Nano Scale Devices and Circuits in NIT Jaipur in April 2018.
  • Attended 2 days International Conference On Advances In Computing Applications ICACA 18, NIT Uttarakhand, Srinagar, Uttarakhand, 26-27th February 2018
  • Attended 10 days Academy training Program on Digital VLSI Circuit Design in NIT Jaipur in June 2017.
  • Attended 3 days Faculty Development Program held at GLA University, Mathura in December 2016.
  • Attended 3 days IEEE International conference on Communication, Control and Intelligent systems held at GLA University, Mathura in November 2016
  • Attended 2 days National workshop on Tanner EDA software based on Mixed Signal VLSI Design held at GLA University, Mathura in February 2016.
  • Attended 2 days IEEE International conference on Communication, Control and intelligent systems held at GLA University, Mathura in November 2015.
  • Attended 1 day National Level Technical Symposia on Emerging Trends in Engineering and Technology held at VIT Chennai campus in May 2015.
  • Attended 2 days DRDO Sponsored 2nd IEEE International conference on Innovations in Information, Embedded and Communication systems (ICIIECS’15) held at Karpagam College of Engineering, Coimbatore in March 2015.

Teaching Experience Summary

  • Currently associated with GLA University as an Assistant Professor in Electronics and Communication Department from July 2015 to till now.
  • Six months teaching assistant-ship in VIT University TAMILNADU from July 2014 to December 2014.
  • One year Lectureship in “Indian Institute of Aircraft Engineering” MAHIPALPUR, New Delhi from August 2011 to July 2012.

Industry Experience Summary

  • Seven months experience in “Akon Electronics India Private Limited” USA based Export Company, BAHADURGARH (Haryana) from September 2012 to March 2013 as a “Testing Engineer”.

Key responsibilities:

  • Create product testing procedure as per MO (Manufacturing Order) and ATP (Acceptance Test Procedure) approved by military standard. Create and maintain test and measurement data record as per ATP specifications.
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